Designing Digital Systems With SystemVerilog

Designing Digital Systems With SystemVerilog

This textbook is for a university freshman/sophomore course on digital logic and digital systems design. In addition, the SystemVerilog language is interwoven throughout the text, providing both new learners as well as existing digital logic designers an introduction to the SystemVerilog language and its use for designing digital systems.
Country USA
Manufacturer Independently published
Binding Paperback
UnitCount 1
UPCs 001980926298
EANs 9781980926290
ReleaseDate 0000-00-00