Formal Semantics and Proof Techniques for Optimizing VHDL Models

Formal Semantics and Proof Techniques for Optimizing VHDL Models

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Product Description

Formal Semantics and Proof Techniques for Optimizing VHDL Models

Technical Specifications

Country
USA
Brand
Springer
Manufacturer
Springer
Binding
Paperback
PartNumber
black & white illustrations
IsAdultProduct
Height
9.25195
Length
6.10235
Weight
0.59083886216
Width
0.42
ReleaseDate
2012-10-26T00:00:01Z
NumberOfItems
1