SystemVerilog for Design Second Edition: A Guide to Using SystemVerilog for Hardware Design and Modeling

Data Converters

SystemVerilog for Verification: A Guide to Learning the Testbench Language Features

RTL Modeling with SystemVerilog for Simulation and Synthesis: Using SystemVerilog for ASIC and FPGA Design

The UVM Primer: A Step-by-Step Introduction to the Universal Verification Methodology

The Art of Electronics: The x Chapters

Learning Python, 5th Edition

Logic Design and Verification Using SystemVerilog (Revised)

Verilog HDL A Guide to Digital Design and Synthesis - Low Price Edition

Verilog and SystemVerilog Gotchas: 101 Common Coding Errors and How to Avoid Them

Advanced FPGA Design: Architecture, Implementation, and Optimization

Finite State Machines in Hardware: Theory and Design (with VHDL and SystemVerilog) (The MIT Press)